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PAPERS: International and National Journals

J12) [Verdoscia16a]
L. Verdoscia, R. Giorgi, "A Data-Flow Soft-Core Processor for Accelerating Scientific Calculation on FPGAs", Mathematical Problems in Engineering, vol. 2016, no. 1, Apr. 2016, pp. 1-21, (article ID 3190234).
Abstract, doi:10.1155/2016/3190234, ISSN: 1563-5147, SCOPUS: 2-s2.0-84973355670.
BibTeX entry: Verdoscia16a.bib.
J11) [Weis16a]
S. Weis, A. Garbade, B. Fechner, A. Mendelson, R. Giorgi, T. Ungerer, "Architectural Support for Fault Tolerance in a Teradevice Dataflow System", Springer Int.l Journal of Parallel Programming, New York, NY, USA, vol. 44, no. 2, Apr 2016, pp. 208-232.
Abstract, PDF, doi:10.1007/s10766-014-0312-y, ISSN: 1573-7640, SCOPUS: 2-s2.0-84901582160, WOS: 000373569600002.
BibTeX entry: Weis16a.bib.
J10) [Giorgi15a]
R. Giorgi, A. Scionti, "A scalable thread scheduling co-processor based on data-flow principles", ELSEVIER Future Generation Computer Systems, Amsterdam, Netherlands, vol. 53, Dec. 2015, pp. 100-108.
Abstract, PDF, doi:10.1016/j.future.2014.12.014, ISSN: 0167-739X, SCOPUS: 2-s2.0-84939202928, WOS: 000361075400010.
BibTeX entry: Giorgi15a.bib.
J9) [Giorgi14a]
R. Giorgi, R. Badia, F. Bodin, A. Cohen, P. Evripidou, P. Faraboschi, B. Fechner, G. Gao, A. Garbade, R. Gayatri, S. Girbal, D. Goodman, B. Khan, S. Koliaï, J. Landwehr, N. Minh, F. Li, M. Lujàn, A. Mendelson, L. Morin, N. Navarro, T. Patejko, A. Pop, P. Trancoso, T. Ungerer, I. Watson, S. Weis, S. Zuckerman, M. Valero, "TERAFLUX: Harnessing dataflow in next generation teradevices", ELSEVIER Microprocessors and Microsystems, Netherlands, Amsterdam, vol. 38, no. 8, Part B, 2014, pp. 976-990.
Abstract, PDF, doi:10.1016/j.micpro.2014.04.001, ISBN: N/A, ISSN: 0141-9331, SCOPUS: 2-s2.0-84912558447, WOS: 000347755500013.
BibTeX entry: Giorgi14a.bib.
J8) [Bartolini08a]
S. Bartolini, I. Branovic, R. Giorgi, E. Martinelli, "Effects of Instruction-set Extensions on an Embedded Processor: a Case Study on Elliptic Curve Cryptography over GF(2/sup m/)", IEEE Trans. Computers, Los Alamitos, CA, USA, vol. 57, no. 5, May 2008, pp. 672-685.
Abstract, PDF, doi:10.1109/TC.2007.70832, ISBN: N/A, ISSN: 0018-9340, SCOPUS: 2-s2.0-64349109200, WOS: 000254054500008.
BibTeX entry: Bartolini08a.bib.
J7) [Bartolini07a]
S. Bartolini, P. Bennati, R. Giorgi, "L'Informatica per i sordi: su palmare la lingua dei segni", Mondo Digitale, June 2007, pp. 42-49.
Abstract, PDF, ISSN: 1720898X, SCOPUS: 2-s2.0-34547978230.
BibTeX entry: Bartolini07a.bib.
J6) [Bartolini06b]
S. Bartolini, R. Giorgi, "Issues in Embedded Single-Chip Multicore Architectures", Journal of Embedded Computing, Amsterdam, Netherlands, vol. 2, no. 2, Dec. 2006, pp. 137-139.
Abstract, PDF, ISSN: 1740-4460.
BibTeX entry: Bartolini06b.bib.
J5) [Foglia05a]
P. Foglia, R. Giorgi, C. Prete, "Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload", ELSEVIER Journal of Parallel and Distributed Computing, Amsterdam, Netherlands, vol. 65, no. 3, Mar. 2005, pp. 289-306.
Abstract, PDF, doi:10.1016/j.jpdc.2004.10.003, ISBN: N/A, ISSN: 0743-7315, SCOPUS: 2-s2.0-14544307829, WOS: 000227568200004.
BibTeX entry: Foglia05a.bib.
J4) [Branovic04b]
I. Branovic, R. Giorgi, E. Martinelli, "A Workload Characterization of Elliptic Curve Cryptography Methods in Embedded Environments", ACM SIGARCH Computer Architecture News, New York, NY, USA, vol. 32, no. 3, June 2004, pp. 27-34.
Abstract, PDF, doi:10.1145/1024295.1024299, ISSN: 0163-5964, SCOPUS: 2-s2.0-77953567600.
BibTeX entry: Branovic04b.bib.
J3) [Kavi01a]
K. Kavi, R. Giorgi, J. Arul, "Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation", IEEE Trans. Computers, Los Alamitos, CA, USA, vol. 50, no. 8, Aug. 2001, pp. 834-846.
Abstract, PDF, doi:10.1109/12.947003, ISBN: N/A, ISSN: 0018-9340, SCOPUS: 2-s2.0-0035416089, WOS: 000170643500007.
BibTeX entry: Kavi01a.bib.
J2) [Giorgi99a]
R. Giorgi, C. Prete, "PSCR: A Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Shared-Memory Multiprocessors", IEEE Trans. Parallel and Distributed Systems, Vol. 10, No. 7, Los Alamitos, CA, USA, July 1999, pp. 742-763.
Abstract, PDF, doi:10.1109/71.780868, ISBN: N/A, ISSN: 1045-9219, SCOPUS: 2-s2.0-0033363130, WOS: 000081713100006.
BibTeX entry: Giorgi99a.bib.
J1) [Giorgi97e]
R. Giorgi, C. Prete, G. Prina, L. Ricciardi, "Trace Factory: Generating Workloads for Trace-Driven Simulation of Shared-Bus Multiprocessors", IEEE Concurrency, Los Alamitos, CA, USA, vol. 5, no. 4, Oct. 1997, pp. 54-68.
Abstract, PDF, doi:10.1109/4434.641627, ISBN: 0-8186-7743-0, ISSN: 1092-3063, SCOPUS: 2-s2.0-0031246107, WOS: A1997YH98400010.
BibTeX entry: Giorgi97e.bib.


B6) [Milutinovic15a]
V. Milutinovic, J. Salom, N. Trifunovic, R. Giorgi, "Guide to DataFlow Supercomputing", Springer, Berlin, DE, Apr 2015, pp. 1-127.
Abstract, doi:10.1007/978-3-319-16229-4, ISBN: 978-3-319-16228-7, ISSN: 1617-7975, WOS: 000374480500008.
BibTeX entry: Milutinovic15a.bib.
B5) [Giorgi10a]
R. Giorgi, S. Wong, "WRC'10: Proc. 2010 Workshop on Reconfigurable Computing", TU-Delft / EWI Computer Enginnering Laboratory, Delft, The Netherlands, Jan. 2010, pp. 1-116.
PDF, ISBN: 978-90-72298-05-8.
BibTeX entry: Giorgi10a.bib.
B4) [Bartolini09b]
S. Bartolini, R. Giorgi, E. Martinelli, "Instruction Set Extensions for Cryptographic Applications", Springer, 2009, pp. 191-233.
Abstract, doi:10.1007/978-0-387-71817-0_9, ISBN: 978-0-387-71816-3.
BibTeX entry: Bartolini09b.bib.
B3) [Bartolini09a]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '09: Proc. 2009 workshop on MEmory performance", ACM, New York, NY, USA, Sept. 2009, pp. 1-48.
doi:10.1145/1621960, ISBN: 978-1-60558-830-8.
BibTeX entry: Bartolini09a.bib.
B2) [Bartolini08b]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '08: Proc. 2008 workshop on MEmory performance", ACM, New York, NY, USA, Oct. 2008, pp. 1-84.
doi:10.1145/1509084, ISBN: 978-1-60558-243-6.
BibTeX entry: Bartolini08b.bib.
B1) [Bartolini07b]
S. Bartolini, P. Foglia, R. Giorgi, C. Prete, "MEDEA '07: Proc. 2007 workshop on MEmory performance", ACM, New York, NY, USA, 2007, pp. 1-113.
doi:10.1145/1327171, ISBN: 978-1-59593-807-7.
BibTeX entry: Bartolini07b.bib.

PAPERS: International and National Conference Proceedings

C8) [Scionti14b]
A. Scionti, S. Kavvadias, R. Giorgi, "Dynamic Power Reduction in Self-Adaptive Embedded Systems through Benchmark Analysis", IEEE MECO 2014, Budva, Montenegro, June 2014, pp. 62-65.
Abstract, PDF, doi:10.1109/MECO.2014.6862659, ISBN: 978-9940-9436-3-9, SCOPUS: 2-s2.0-84912061826.
BibTeX entry: Scionti14b.bib.
C7) [Verdoscia14a]
L. Verdoscia, R. Vaccaro, R. Giorgi, "A Clockless Computing System based on the Static Dataflow Paradigm", Proc. IEEE Int.l Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM-2014), Edmonton, Canada, Aug. 2014, pp. 30-37.
Abstract, PDF, doi:10.1109/DFM.2014.10, ISBN: 978-147998095-6, SCOPUS: 2-s2.0-84949924153, WOS: 000380554400005.
BibTeX entry: Verdoscia14a.bib.
C6) [Alioto10a]
C. M. B. Alioto, P. Bennati, R. Giorgi, "Exploiting Locality to Improve Leakage Reduction in Embedded Drowsy I-Caches at Same Area/Speed", IEEE Int.l Symp. on Circuits and Systems (ISCAS), Paris, France, May 2010, pp. 37-40.
Abstract, PDF, doi:10.1109/ISCAS.2010.5537105, ISBN: 978-1-4244-5309-2, ISSN: 0271-4302, SCOPUS: 2-s2.0-77955986564, WOS: 000287216000010.
BibTeX entry: Alioto10a.bib.
C5) [Stavrou09a]
K. Stavrou, D. Pavlou, M. Nikolaides, P. Petrides, P. Evripidou, P. Trancoso, Z. Popovic, R. Giorgi, "Programming Abstractions and Toolchain for Dataflow Multithreading Architectures", IEEE Proc. Eighth Int.l Symp. on Parallel and Distributed Computing (ISPDC 2009), Lisbon, Portugal, July 2009, pp. 107-114.
Abstract, PDF, doi:10.1109/ISPDC.2009.35, ISBN: 978-0-7695-3680-4, ISSN: N/A, SCOPUS: 2-s2.0-74349119578, WOS: 000275741200013.
BibTeX entry: Stavrou09a.bib.
C4) [Giorgi07a]
R. Giorgi, Z. Popovic, N. Puzovic, "DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems", Proc. IEEE SBAC-PAD, Gramado, Brasil, Oct. 2007, pp. 263-270.
Abstract, PDF, doi:10.1109/SBAC-PAD.2007.27, ISBN: 0-7695-23014-1, ISSN: 1550-6533, SCOPUS: 2-s2.0-47249097035, WOS: 000252137000031, INSPEC: 9855214.
BibTeX entry: Giorgi07a.bib.
C3) [Branovic04a]
I. Branovic, R. Giorgi, E. Martinelli, "WebMIPS: A New Web-Based MIPS Simulation Environment for Computer Architecture Education.", IEEE Workshop on Computer Architecture Education (WCAE-04), Munich, Germany, June 2004, pp. 93-98.
Abstract, PDF, doi:10.1145/1275571.1275596, SCOPUS: 2-s2.0-84897704899.
BibTeX entry: Branovic04a.bib.
C2) [Giorgi97c]
R. Giorgi, P. Foglia, C. Prete, "Bus Utilization Analysis of Multithreaded Shared-Bus Multiprocessors: Initial Results", IASTED Proc. 9th Int.l Conf. on Parallel and Distributed Computing and Systems (IPDCS-97), Washington, DC, USA, Oct. 1997, pp. 24-29.
Abstract, PDF, ISBN: 0-88986-240-0.
BibTeX entry: Giorgi97c.bib.
C1) [Giorgi97b]
R. Giorgi, C. Prete, G. Prina, "Cache Memory Design for Embedded Systems Based on Program Locality Analysis", IEEE Proc. Int.l Conf. on Microelectronic System Education (MSE-97), Arlington, VA, USA, July 1997, pp. 16-18.
Abstract, PDF, doi:10.1109/MSE.1997.612528, ISBN: 0-8186-7996-4, ISSN: N/A, SCOPUS: 2-s2.0-0030681889, WOS: A1997BJ30F00007.
BibTeX entry: Giorgi97b.bib.