Roberto Giorgi's Selected Papers

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PAPERS: International and National Journals

J8) [Bartolini08a]
S. Bartolini, I. Branovic, R. Giorgi, E. Martinelli, "Effects of Instruction-set Extensions on an Embedded Processor: a Case Study on Elliptic Curve Cryptography over GF(2/sup m/)", IEEE Trans. Computers, ISSN:0018-9340, Los Alamitos, CA, USA, vol. 57, no. 5, May 2008, pp. 672-685, doi 10.1109/TC.2007.70832.
Abstract, PDF. BibTeX entry: Bartolini08a.bib.

J7) [Bartolini07a]
S. Bartolini, P. Bennati, R. Giorgi, "L'Informatica per i sordi: su palmare la lingua dei segni", Mondo Digitale, June 2007, pp. 42-49.
Abstract, PDF. BibTeX entry: Bartolini07a.bib.

J6) [Bartolini06b]
S. Bartolini, R. Giorgi, "Issues in Embedded Single-Chip Multicore Architectures", Journal of Embedded Computing, ISSN:1740-4460, Amsterdam, Netherlands, vol. 2, no. 2, Dec. 2006, pp. 137-139.
Abstract, PDF. BibTeX entry: Bartolini06b.bib.

J5) [Foglia05a]
P. Foglia, R. Giorgi, C. A. Prete, "Reducing coherence overhead and boosting performance of high-end SMP multiprocessors running a DSS workload", ELSEVIER Journal of Parallel and Distributed Computing, ISSN:0743-7315, Amsterdam, Netherlands, vol. 65, no. 3, Mar. 2005, pp. 289-306, doi 10.1016/j.jpdc.2004.10.003.
Abstract, PDF. BibTeX entry: Foglia05a.bib.

J4) [Branovic04b]
I. Branovic, R. Giorgi, E. Martinelli, "A Workload Characterization of Elliptic Curve Cryptography Methods in Embedded Environments", ACM SIGARCH Computer Architecture News, ISSN:0163-5964, New York, NY, USA, vol. 32, no. 3, June 2004, pp. 27-34, doi 10.1145/1024295.1024299.
Abstract, PDF. BibTeX entry: Branovic04b.bib.

J3) [Kavi01a]
Krishna M. Kavi, Roberto Giorgi, Joseph Arul, "Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation", IEEE Trans. Computers, ISSN:0018-9340, Los Alamitos, CA, USA, vol. 50, no. 8, Aug. 2001, pp. 834-846, doi 10.1109/12.947003.
Abstract, PDF. BibTeX entry: Kavi01a.bib.

J2) [Giorgi99a]
Roberto Giorgi, Cosimo Antonio Prete, "PSCR: A Coherence Protocol for Eliminating Passive Sharing in Shared-Bus Shared-Memory Multiprocessors", IEEE Trans. Parallel and Distributed Systems, Vol. 10, No. 7, ISSN:1045-9219, Los Alamitos, CA, USA, July 1999, pp. 742-763, doi 10.1109/71.780868.
Abstract, PDF. BibTeX entry: Giorgi99a.bib.

J1) [Giorgi97e]
R. Giorgi, C.A. Prete, G. Prina, L. Ricciardi, "Trace Factory: Generating Workloads for Trace-Driven Simulation of Shared-Bus Multiprocessors", IEEE Concurrency, ISSN:1092-3063, Los Alamitos, CA, USA, vol. 5, no. 4, Oct. 1997, pp. 54-68, doi 10.1109/4434.641627.
Abstract, PDF. BibTeX entry: Giorgi97e.bib.

BOOKS and BOOK'S CHAPTERS

B5) [Bartolini09b]
S. Bartolini, P. Foglia, R. Giorgi, C. A. Prete, "MEDEA '09: Proc. 2009 workshop on MEmory performance", ACM, ISBN:978-1-60558-830-8, New York, NY, USA, Sept. 2009, pp. 1-48, doi 10.1145/1621960.
BibTeX entry: Bartolini09b.bib.

B4) [Bartolini09a]
S. Bartolini, R. Giorgi, E. Martinelli, "Cryptographic Engineering", Springer, ISBN:978-0-387-71816-3, 2009, pp. 191-233, doi 10.1007/978-0-387-71817-0.
PDF. BibTeX entry: Bartolini09a.bib.

B3) [Bartolini08b]
S. Bartolini, P. Foglia, R. Giorgi, C. A. Prete, "MEDEA '08: Proc. 2008 workshop on MEmory performance", ACM, ISBN:978-1-60558-243-6, New York, NY, USA, Oct. 2008, pp. 1-84, doi 10.1145/1509084.
BibTeX entry: Bartolini08b.bib.

B2) [Bartolini07b]
S. Bartolini, P. Foglia, R. Giorgi, C. A. Prete, "MEDEA '07: Proc. 2007 workshop on MEmory performance", ACM, ISBN:978-1-9593-807-7, New York, NY, USA, 2007, pp. 1-113, doi 10.1145/1327171.
BibTeX entry: Bartolini07b.bib.

B1) [Bartolini06f]
S. Bartolini, P. Foglia, R. Giorgi, C. A. Prete, "Proc. 2006 workshop on MEmory performance: DEaling with Applications, systems and architectures", ACM Press, ISBN:1-59593-568-1, New York, NY, U.S.A., 2006, pp. 1-52, doi 10.1145/1166133.
BibTeX entry: Bartolini06f.bib.

PAPERS: International and National Conference Proceedings

C5) [Stavrou09a]
K. Stavrou, D. Pavlou, M. Nikolaides, P. Petrides , P. Evripidou, P. Trancoso, Z. Popovic, R. Giorgi, "Programming Abstractions and Toolchain for Dataflow Multithreading Architectures", IEEE Proc. Eighth Int.l Symp. on Parallel and Distributed Computing (ISPDC 2009), ISBN:978-0-7695-3680-4, Lisbon, Portugal, July 2009, pp. 107-114, doi 10.1109/ISPDC.2009.35.
Abstract, PDF. BibTeX entry: Stavrou09a.bib.

C4) [Giorgi07a]
R. Giorgi, Z. Popovic, N. Puzovic, "DTA-C: A Decoupled multi-Threaded Architecture for CMP Systems", Proc. IEEE SBAC-PAD, ISBN:0-7695-23014-1, Gramado, Brasil, Oct. 2007, pp. 263-270, doi 10.1109/SBAC-PAD.2007.27.
Abstract, PDF. BibTeX entry: Giorgi07a.bib.

C3) [Branovic04a]
I. Branovic, R. Giorgi, E. Martinelli, "WebMIPS: A New Web-Based MIPS Simulation Environment for Computer Architecture Education.", IEEE Workshop on Computer Architecture Education (WCAE-04), Munich, Germany, June 2004, pp. 93-98.
Abstract, PDF. BibTeX entry: Branovic04a.bib.

C2) [Giorgi97c]
R. Giorgi, P. Foglia, C.A. Prete, "Bus Utilization Analysis of Multithreaded Shared-Bus Multiprocessors: Initial Results", IASTED Proc. 9th Int.l Conf. on Parallel and Distributed Computing and Systems (IPDCS-97), ISBN:0-88986-240-0, Washington, DC, USA, Oct. 1997, pp. 24-29.
Abstract, PDF. BibTeX entry: Giorgi97c.bib.

C1) [Giorgi97b]
R. Giorgi, C.A. Prete, G. Prina, "Cache Memory Design for Embedded Systems Based on Program Locality Analysis", IEEE Proc. Int.l Conf. on Microelectronic System Education (MSE-97), ISBN:0-8186-7996-4, Arlington, VA, USA, July 1997, pp. 16-18.
Abstract, PDF. BibTeX entry: Giorgi97b.bib.